Dr Qian Wang
Dr Qian Wang is a Research Associate in Silicon Carbide (SiC) power electronics at the Department of Engineering, University of Cambridge. His work is situated within the Electrical Engineering division, where he focuses on advanced wide–bandgap semiconductor devices for high-efficiency power applications.
He is a specialist in wide–bandgap semiconductor devices, with a particular focus on silicon carbide power MOSFETs and emerging device architectures, such as FinFET structures. His research addresses key challenges in SiC technology, including interface limitations, carrier mobility, and device reliability under high-voltage and high-temperature operating conditions.
During his doctoral research in Engineering at the University of Cambridge, he investigated the fundamental physics of SiC MOSFET channels and developed advanced device concepts, such as FinFET-based structures, to enhance electron mobility and overall device performance. His work combined TCAD simulation with device design strategies to address long-standing limitations associated with the SiC/SiO₂ interface.
Dr Wang’s research outputs contribute to the broader advancement of semiconductor device engineering, with a focus on improving efficiency, thermal performance, and scalability of SiC technologies. He is actively involved in collaborative research projects and contributes to the demonstration of undergraduate students within the Department of Engineering.
Select publications
- Q. Wang, F. Udrea, H. Fujioka, H. Tomita, T. Nishiwaki, T. Kumazawa, M. Kumita, M. Okuda, H.
Fujiwara. “The temperature coefficient of threshold voltage for high voltage 4H-SiC FinFET.” IEEE
Electron Device Letters (2025). - H. Fujioka, H. Tomita, M. Kumita, T. Kumazawa, F. Udrea, Q. Wang. (Unpublished) PCT
international patent application, filed via Japan, internal reference K240355PCT, filed in 2024. - K. Naydenov, Q. Wang, F. Udrea, H. Fujioka, H. Tomita, T. Nishiwaki, T. Kumazawa and H.
Fujiwara. “The FinFET effect in lateral 4H-SiC and Silicon multi-gate MOSFETs.” Semiconductor
Science and Technology 39.12 (2024): 125013. - Q. Wang, N. Donato, F. Udrea. “The vertical 4H-SiC FinFET concept: modelling power devices
towards the ideal channel resistance. ” Joint Japan-UK (JST-EPSRC) workshop 2025. - H. Fujioka, T. Kumazawa, H. Tomita, M. Okuda, H. Fujiwara, Q. Wang, T. Kimoto, and F. Udrea.
“Breaking the Trade-off between On-Resistance and Short-Circuit Withstand Time in 1.2 kV – 500 A
SiC MOSFETs Using a Narrow Fin Channel.” IEEE International Electron Devices Meeting (2025). - Q. Wang, N. Donato, F. Udrea, H. Fujioka, T. Kumazawa, H. Tomita, M. Okuda, T. Nishiwaki, H.
Fujiwara, T. Kimoto. “Superior third quadrant performance in ultra narrow 4H-SiC vertical FinFETs.”
38th International Symposium on Power Semiconductor Devices and ICs (2026), (accepted). - Q. Wang, N. Donato, F. Udrea, H. Fujioka, T. Kumazawa, H. Tomita, M. Okuda, T. Nishiwaki, H.
Fujiwara. “Monotonic Positive Temperature Coefficient of On-State Resistance in 4H-SiC FinFETs.” IEEE Transactions on Electron Devices (2026), (to be submitted). - Q. Wang, N. Donato, F. Udrea, K. Mikami, T. Kimoto “Generalised Channel-Mobility Modelling for Predicting the Ultimate Mobility Limit in 4H-SiC (0001) n-Channel MOSFETs.” Journal of Applied Physics (2026), (to be
submitted).
